58 lines
1.2 KiB
Makefile
58 lines
1.2 KiB
Makefile
# This is some Makefile I've been using for projects for a while and can't find
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# where I originally got it
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CC ?= gcc
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SRC_PATH = src
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BUILD_PATH = build
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BIN_PATH = $(BUILD_PATH)/bin
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BIN_NAME = gol
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SRC_EXT = c
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SOURCES = $(shell find $(SRC_PATH) -name '*.$(SRC_EXT)' | sort -k 1nr | cut -f2-)
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OBJECTS = $(SOURCES:$(SRC_PATH)/%.$(SRC_EXT)=$(BUILD_PATH)/%.o)
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DEPS = $(OBJECTS:.o=.d)
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COMPILE_FLAGS = -Wall -g -fopenmp -lm -std=c99
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INCLUDES = -I include/
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LIBS = -fopenmp -lm
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.PHONY: default_target
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default_target: release
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.PHONY: release
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release: dirs
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@$(MAKE) all
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.PHONY: dirs
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dirs:
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@echo "Creating directories"
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@mkdir -p $(dir $(OBJECTS))
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@mkdir -p $(BIN_PATH)
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.PHONY: clean
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clean:
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@echo "Deleting $(BIN_NAME) symlink"
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@$(RM) $(BIN_NAME)
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@echo "Deleting directories"
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@$(RM) -r $(BUILD_PATH)
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@$(RM) -r $(BIN_PATH)
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.PHONY: all
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all: $(BIN_PATH)/$(BIN_NAME)
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@echo "Making symlink: $(BIN_NAME) -> $<"
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@$(RM) $(BIN_NAME)
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@ln -s $(BIN_PATH)/$(BIN_NAME) $(BIN_NAME)
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$(BIN_PATH)/$(BIN_NAME): $(OBJECTS)
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@echo "Linking: $@"
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$(CC) $(OBJECTS) -o $@ ${LIBS}
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-include $(DEPS)
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$(BUILD_PATH)/%.o: $(SRC_PATH)/%.$(SRC_EXT)
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@echo "Compiling: $< -> $@"
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$(CC) $(COMPILE_FLAGS) $(INCLUDES) -MP -MMD -c $< -o $@
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